An Impulse-Response Based Methodology for Modeling Complex Interconnect Networks

We have presented a methodology for modeling complex on-chip interconnect networks in a computationally efficient manner. The method depends on defining unit cells, which can comprise any interconnect network, and assigning equivalent circuits to each unit cell, which are brought together to form a full network. We have showed that to find the response at a given point to a random input, all we need to calculate and store is the impulse responses at that point for impulses throughout the system. The physical effects of the semiconducting substrate and network layouts are reflected by the unit cell equivalent circuit design, the tradeoff being between the physical accuracy and complexity of the final network to be solved. The method is extendable to any interconnect network, including 3-D systems, simply by defining coupling networks between unit cells. Its flexibility allows rapid exploration of the responses of different layout types to various random or directed inputs, having solved for the impulse responses just once