Title :
Delay And Area Optimization For Compact Placement By Gate Resizing And Relocation
Keywords :
Capacitance; Circuits; Cost function; Delay; Libraries; Linear programming; Logic gates; Piecewise linear approximation; Piecewise linear techniques; Timing;
Conference_Titel :
Computer-Aided Design, 1994., IEEE/ACM International Conference on
Print_ISBN :
0-8186-3010-8
DOI :
10.1109/ICCAD.1994.629757
