• DocumentCode
    3283190
  • Title

    A CMOS sample and hold for high-speed ADCs

  • Author

    Brigati, Simona ; Maloberti, Franco ; Torelli, Guido

  • Author_Institution
    Dipartimento di Elettronica, Pavia Univ., Italy
  • Volume
    1
  • fYear
    1996
  • fDate
    12-15 May 1996
  • Firstpage
    163
  • Abstract
    This paper presents an improved topology for a sample and hold (S/H) for high-speed ADCs. A S/H circuit designed following the described technique is also presented. Simulation results, referred to a 1.2 μm CMOS technology, showed 10 bit resolution at 50 MHz sampling rate is achieved
  • Keywords
    CMOS analogue integrated circuits; analogue-digital conversion; operational amplifiers; sample and hold circuits; 1.2 micron; 10 bit; 50 MHz; CMOS technology; S/H circuit; high-speed ADC; sample/hold circuit; CMOS technology; Capacitors; Chromium; Circuits; Clocks; Harmonic distortion; Operational amplifiers; Sampling methods; Switches; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    0-7803-3073-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1996.539834
  • Filename
    539834
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3283190