• DocumentCode
    3283256
  • Title

    Edge-map: Optimal Performance Driven Technology Mapping for Iterative Lut Based Fpga Designs

  • Author

    Yang, Honghua ; Wong, D.F.

  • fYear
    1994
  • fDate
    6-10 Nov 1994
  • Firstpage
    150
  • Lastpage
    155
  • Keywords
    Circuit testing; Computer networks; Delay estimation; Field programmable gate arrays; Heuristic algorithms; Integrated circuit interconnections; Iterative algorithms; Packaging; Routing; Table lookup;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1994., IEEE/ACM International Conference on
  • ISSN
    1063-6757
  • Print_ISBN
    0-8186-3010-8
  • Type

    conf

  • DOI
    10.1109/ICCAD.1994.629758
  • Filename
    629758
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3283256