An analog integrated circuit of a Hamming neural network designed and fabricated in CMOS technology

Author

Li, Bin-Qiao ; Li, Zhi-Jian ; Shi, Bing-Xue

Author_Institution

Inst. of Microelectron., Tsinghua Univ., Beijing, China

Volume

1

fYear

1993

fDate

25-29 Oct. 1993

Firstpage

879

Abstract

An analog integrated circuit of a Hamming neural network designed and fabricated in CMOS technology is presented. The template matching calculation circuit in the neural network is composed of distributed neurons formed by pull-up and pull-down CMOS transistor pairs. A multiple input and output "winner take all" network is designed in pseudo NMOS circuit. Testing results show that the Hamming network can work at high speed, and the "winner take all" network has a high resolution accuracy.

Keywords

CMOS analogue integrated circuits; analogue processing circuits; image recognition; integrated circuit design; neural chips; CMOS technology; CMOS transistor pairs; Hamming neural network; analog integrated circuit; image pattern recognition; pseudo NMOS circuit; pull-down CMOS transistors; pull-up CMOS transistors; template matching calculation circuit; winner-take-all network; Analog integrated circuits; Artificial neural networks; CMOS analog integrated circuits; CMOS technology; Integrated circuit technology; Intelligent networks; MOSFETs; Neural networks; Neurons; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Neural Networks, 1993. IJCNN '93-Nagoya. Proceedings of 1993 International Joint Conference on

Print_ISBN

0-7803-1421-2

Type

conf

DOI

10.1109/IJCNN.1993.714051

Filename

714051