Pre-designed Prognostic cells for host circuits reliability monitoring

CMOS integrated circuits have certain defined failure mechanisms that can contribute to end-of-life failure. These failure mechanisms include time dependent dielectric breakdown, electromigration, hot carrier injection and so on. All of these common failure modes are far worse at geometries below 0.18 μm. The traditional reliability predictions for integrated circuits are inaccurate because they do not account for the actual environments that the circuits are subjected to in its life cycle. Prognostics is a method that enables monitoring the state of reliability of a product in real time, and therefore can be used to provide advance warning of a failure, to provide condition based maintenance and to help in IC design and development. Pre-designed Prognostic cells are incorporated into integrated circuits to provide advance warning of failure for specific wear-out failure mechanisms. The time to failure of these prognostic cells can be pre-calibrated with respect to the time to failure of the host circuit. The accurate failure prediction and the remaining useful life for specific failure mechanism were achieved from the prognostic cell with the proper prognostic distance.