Title :
Clock Period Constrained Minimal Buffer Insertion In Clock Trees
Keywords :
Algorithm design and analysis; Clocks; Delay effects; Frequency; Logic; Pins; Propagation delay; Routing; Synchronization; Timing;
Conference_Titel :
Computer-Aided Design, 1994., IEEE/ACM International Conference on
Print_ISBN :
0-8186-3010-8
DOI :
10.1109/ICCAD.1994.629769