Deposition and electrical characterisation of a MOS memory structure containing AU nanoparticles in a high-k dielectric layer

Author

Sargentis, Ch ; Giannakopoulos, K. ; Travlos, A. ; Tsamakis, D. ; Krokidis, G.

Author_Institution

Dept. of Electr. & Comput. Eng., National Tech. Univ. of Athens

fYear

2005

fDate

7-9 Dec. 2005

Firstpage

342

Lastpage

343

Abstract

In this work, we use the MBE method in order to fabricate MOS memory devices with gold (Au) nanoparticles embedded on a SiO₂/HfO₂ interface. We have chosen to work with Au nanoparticles due to the fact that Au has a large work function. The device shows a clear hysteresis behavior on C-V (capacitance-voltage) and G-V (conductance-voltage) measurements. These measurements demonstrate that in our device we have a charge storage effect. When we apply a positive voltage to the gate, electrons tunnel through the thin SiO₂ layer and are stored in the metallic nanoparticles. This MOS device shows a clear memory effect

Keywords

MOS memory circuits; dielectric hysteresis; gold; hafnium compounds; high-k dielectric thin films; molecular beam epitaxial growth; nanoparticles; silicon compounds; MBE; MOS memory devices; SiO₂-HfO₂-Au; capacitance-voltage measurement; charge storage effect; clear memory effect; conductance-voltage measurements; deposition characterization; electrical characterisation; high-k dielectrics; hysteresis behavior; metallic nanoparticles; work function; Capacitance measurement; Capacitance-voltage characteristics; Charge measurement; Current measurement; Gold; Hafnium oxide; High-K gate dielectrics; Hysteresis; Nanoparticles; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Device Research Symposium, 2005 International

Conference_Location

Bethesda, MD

Print_ISBN

1-4244-0083-X

Type

conf

DOI

10.1109/ISDRS.2005.1596126

Filename

1596126