DocumentCode
3285158
Title
Joint error detection and VF arithmetic coding
Author
Chen, Hongyuan
Author_Institution
Nokia Res. Center, Nokia Japan Co. Ltd., Japan
Volume
9
fYear
2001
fDate
2001
Firstpage
2763
Abstract
This paper proposes a new variable-to-fixed length arithmetic coding (VFAC) with error detecting capability. It achieves VF coding by inserting the internal state of the decompressor into compressed data. The internal state represents the offset of the sub-interval corresponding to the decompressed symbol and is also used for error detection. Convolutional operations are applied to encoding and decoding for improving error control capability. Proposed VFAC is evaluated by theoretical analysis and computer simulations. Simulation results show that more than 99.3% of errors occurring in a codeword can be detected
Keywords
arithmetic codes; decoding; error detection codes; source coding; variable length codes; computer simulations; convolutional operations; decoding; decompressed symbol; encoding; error control capability; error detecting capability; error detection; internal state; variable-to-fixed length arithmetic coding; Arithmetic; Computer errors; Computer simulation; Convolutional codes; Decoding; Encoding; Error correction; Feeds; Gas detectors; Redundancy;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, 2001. ICC 2001. IEEE International Conference on
Conference_Location
Helsinki
Print_ISBN
0-7803-7097-1
Type
conf
DOI
10.1109/ICC.2001.936653
Filename
936653
Link To Document