Title :
Compact n-well design of high density p-type bulk finFET for CMOS technology
Author :
Choi, Byung-Kil ; Kwang-Ho Baek ; Min, Young ; Lee, Jong Ho
Author_Institution :
Sch. of Electr. & Electron. Eng., Kyungpook Nat. Univ., Daegu
Abstract :
We designed n-well of bulk FinFET for very large scale integration (VLSI) in CMOS application. In this study, we focused on a parasitic vertical p+-n-p bipolar junction transistor (BJT) that participates in latch-up. To keep the current gain of the parasitic BJT within unity, several parameters are considered: base width (Wb ), n-well doping concentration and profile, fin width. The leakage current between n-wells was also investigated
Keywords :
CMOS integrated circuits; MOSFET; VLSI; bipolar transistors; leakage currents; semiconductor device models; CMOS technology; VLSI; compact n-well design; leakage current; n-well doping concentration; p type bulk FinFET; parasitic vertical bipolar junction transistor; very large scale integration; CMOS technology; Design engineering; Doping profiles; Electric variables; FinFETs; Leakage current; Robustness; Very large scale integration; Voltage;
Conference_Titel :
Semiconductor Device Research Symposium, 2005 International
Conference_Location :
Bethesda, MD
Print_ISBN :
1-4244-0083-X
DOI :
10.1109/ISDRS.2005.1596155
