Fault-recovery Non-FPGA-based Adaptable Computing System Design

Reconfigurability with fault-tolerance is one of the most desirable hardware combinations for space computing systems. This paper introduces an adaptable computing architecture that includes random and delay- fault recovering capability for avionics and space applications. A micro-architecture level fault handling and recovering scheme that can immunize random/delay errors is presented as a means of overcoming the limitations of gate-level fault tolerance. The fault- recovery flexible architecture was developed based on a pure-ASIC-based retargetable computing system. The retargetable system also offers sufficient flexibility without employing programmable devices. This adaptable system reasserts different signal patterns for random/delay faults by rerouting micro-operations of the operation that caused the faults. Different sequences of bit-pattern generated by the retargetable system avoid the same faulty situation in high-speed VLSI circuits, while continuously supporting seamless modification and migration of underlying hardware and software after fabrication of retargetable systems.