QR Recursive Least Squares IP Core Example

Author

Lightbody, Gaye ; Woods, Roger

Author_Institution

Univ. of Ulster, Newtownabbey

fYear

2008

fDate

March 31 2008-April 4 2008

Firstpage

369

Lastpage

374

Abstract

With transistor counts increasing at a rate of 58% per year and design productivity only growing at 21% per year, there is an important need to develop new design approaches to close this gap. This paper outlines the process by which IP cores are generated and shows how the design methodology can be improved to enhance their usability. The process is demonstrated using a recursive least squares (RLS) adaptive filter example.

Keywords

adaptive filters; industrial property; least squares approximations; IP core; QR recursive least squares; adaptive filter; design for reuse; design methodology; intellectual property; Arithmetic; Circuits; Design methodology; Discrete cosine transforms; Least squares methods; Productivity; Resonance light scattering; Silicon; Software libraries; System-level design; IP cores; RLS filter implementation; design for reuse;

fLanguage

English

Publisher

ieee

Conference_Titel

Engineering of Computer Based Systems, 2008. ECBS 2008. 15th Annual IEEE International Conference and Workshop on the

Conference_Location

Belfast

Print_ISBN

0-7695-3141-5

Type

conf

DOI

10.1109/ECBS.2008.54

Filename

4492418

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3286410