Title :
Intercube communication for the iPSC/860
Author_Institution :
NASA Ames Res. Center, Moffett Field, CA, USA
Abstract :
In this paper, new functions that enable efficient intercube communication on the Intel iPSC/860 are introduced. Communication between multiple cubes (power-of-two number of processor nodes) within the Intel iPSC/860 is a desirable feature to facilitate the implementation of interdisciplinary problems such as the grand challenge problems of the High Performance Computing and Communications Project (HPCCP). Intercube communication allows programs for each discipline to be developed independently on the hypercube and then integrated at the interface boundaries using intercube communication
Keywords :
hypercube networks; multiprocessing systems; High Performance Computing and Communications Project; Intel iPSC/860; hypercube; intercube communication; interface boundaries; processor nodes; File systems; Government; Hardware; High performance computing; Hypercubes; Mesh generation; NASA; Protection; Routing; Wires;
Conference_Titel :
Scalable High Performance Computing Conference, 1992. SHPCC-92, Proceedings.
Conference_Location :
Williamsburg, VA
Print_ISBN :
0-8186-2775-1
DOI :
10.1109/SHPCC.1992.232627