CMOS transistor mismatch model with temperature effect for HSPICE and SPECTRE

The purpose of this paper is to present a HSPICE and a SPECTRE models that are able to describe the temperature effect on CMOS transistor pair mismatch by adding a linear temperature dependent equation to the existing model. Here, we model the mismatch behavior of MOS transistor threshold voltage (Vt) and drain current (Id) at different temperatures 30, 90 and 120 degree C. At high temperature, the matching of both Vt and Id improve. This effect has been captured by including the temperature effect to the mismatch model.