• DocumentCode
    3287859
  • Title

    Control of electro-chemical etching for uniform 0.1 /spl mu/m gate formation of HEMT

  • Author

    Nitta, Y. ; Ohshima, T. ; Shigemasa, R. ; Nishi, S. ; Kimura, T.

  • Author_Institution
    Semicond. Technol. Lab., Oki Electr. Ind. Co. Ltd., Tokyo, Japan
  • fYear
    1996
  • fDate
    8-11 Dec. 1996
  • Firstpage
    47
  • Lastpage
    50
  • Abstract
    In gate recess etching of a 0.1 /spl mu/m gate HEMT process, an anomalous phenomenon caused by electrochemical etching was found. The isolation region implanted with oxygen ion was etched more deeply than the channel region, which caused a non-flat etched surface. This anomaly affects device performance and its uniformity seriously. We suppressed the anomaly by optimizing the condition of the isolation and the pattern of the device. A flat etched surface was achieved and uniform device characteristics obtained.
  • Keywords
    III-V semiconductors; aluminium compounds; etching; gallium arsenide; high electron mobility transistors; indium compounds; ion implantation; isolation technology; millimetre wave field effect transistors; process control; surface topography; 0.1 mum; InGaAs-AlGaAs; InGaAs/AlGaAs HEMT; O ion implantation; device performance uniformity; electrochemical etching control; etched surface flatness; gate recess etching; isolation optimization; isolation region; millimeter-wave communication; uniform 0.1 /spl mu/m gate formation; Chemicals; Circuits; Electrodes; Etching; FETs; Gallium arsenide; HEMTs; Monitoring; Threshold voltage; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1996. IEDM '96., International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0163-1918
  • Print_ISBN
    0-7803-3393-4
  • Type

    conf

  • DOI
    10.1109/IEDM.1996.553119
  • Filename
    553119