Title :
Hybrid aggregated-vector algorithm for efficient parallelization of Fast Multipole Method
Author :
Das, Aruneema ; Gope, Dibakar
Author_Institution :
Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India
Abstract :
An efficient parallelization algorithm for the Fast Multipole Method which aims to alleviate the parallelization bottleneck arising from lower job-count closer to root levels is presented. An electrostatic problem of 12 million non-uniformly distributed mesh elements is solved with 80-85% parallel efficiency in matrix setup and matrix-vector product using 60GB and 16 threads on shared memory architecture.
Keywords :
matrix algebra; shared memory systems; efficiency 80 percent to 85 percent; electrostatic problem; fast multipole method; hybrid aggregated-vector algorithm; matrix setup; matrix-vector product; memory size 60 GByte; parallelization algorithm; shared memory architecture; Algorithm design and analysis; Capacitance; Geometry; Instruction sets; Moment methods; Switches; Vectors; Fast Multipole Method (FMM); Shared memory parallelization (SMP);
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2012 IEEE 21st Conference on
Conference_Location :
Tempe, AZ
Print_ISBN :
978-1-4673-2539-4
Electronic_ISBN :
978-1-4673-2537-0
DOI :
10.1109/EPEPS.2012.6457872
