Wafer-level TSV connectivity test using ring oscillator scheme

Author

Jun So Pak ; Jonghyun Cho ; Joohee Kim ; Heegon Kim ; Kiyeong Kim ; Joungho Kim ; Junho Lee ; Kunwoo Park

Author_Institution

Dept. of Electr. Eng., KAIST, Daejeon, South Korea

fYear

2012

fDate

21-24 Oct. 2012

Firstpage

228

Lastpage

231

Abstract

This paper presents the wafer-lvel TSV connectivity test method using ring oscillator scheme by showing its good immunity to TSV and chip process variations, efficient use of a chip area, simplicity of the test circuitry design, and low cost from its application before expensive wafer thinning and stacking processes. The proposed method can detect a delamination failure between TSVs and back end lines on a single TSV processed wafer.

Keywords

delamination; failure analysis; integrated circuit design; integrated circuit reliability; integrated circuit testing; oscillators; chip process variations; delamination failure; expensive wafer thinning process; ring oscillator scheme; single TSV processed wafer; test circuitry design; through silicon via; wafer stacking process; wafer-level TSV connectivity test method; Arrays; Capacitance; Inverters; Radiation detectors; Ring oscillators; Through-silicon vias; 3DIC; Connectivity; Delamination Problem; Ring Oscillator; TSV; Wafer-level;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging and Systems (EPEPS), 2012 IEEE 21st Conference on

Conference_Location

Tempe, AZ

Print_ISBN

978-1-4673-2539-4

Electronic_ISBN

978-1-4673-2537-0

Type

conf

DOI

10.1109/EPEPS.2012.6457883

Filename

6457883