A Design of 2.6 GHz Auto-Biasing Cascode Class-E PA with Vdd/AM and Vdd /PM Compensations in EER System

Author

Tsou, Wen-An ; Wuen, Wen-Shen ; Wen, Kuei-Ann

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2009

fDate

16-17 May 2009

Firstpage

47

Lastpage

50

Abstract

An auto-biasing cascode class-E PA which can compensate the Vdd/AM and Vdd/PM distortion resulting from supply modulation has been proposed. The output voltage of auto-biasing control circuit is generated and varied linearly with PApsilas supply voltage so that the cascode transistor is degenerated into a resistance and the PApsilas nonlinear distortion can be compensated. The simulation result shows that the distortion is compensated evidently and the system co-simulation demonstrated that system EVM can be improved from -17 to -19 dB. Also, the drain efficiency of the PA can be improved 15% within small supply voltage range.

Keywords

UHF power amplifiers; nonlinear distortion; reliability; auto-biasing control circuit; cascode transistor; class-E power amplifiers; frequency 2.6 GHz; nonlinear distortion; CMOS technology; Circuit simulation; Impedance; Linearity; Nonlinear distortion; Power amplifiers; Radiofrequency amplifiers; Stress; Transmitters; Voltage; class-E power amplifier; envelope elimination and restoration (EER); transmitters;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits, Communications and Systems, 2009. PACCS '09. Pacific-Asia Conference on

Conference_Location

Chengdu

Print_ISBN

978-0-7695-3614-9

Type

conf

DOI

10.1109/PACCS.2009.109

Filename

5232283