DocumentCode
3288279
Title
Generalization of independent faults for transition faults
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fYear
1992
fDate
7-9 April 1992
Firstpage
7
Lastpage
12
Abstract
Independent faults were shown to he effective in computing small test sets for stuck-at faults. An efficient procedure for computing a maximal set of independent stuck-at faults is proposed. The notion of independent faults is then extended to other fault models, specifically, transition faults, that require two-pattern tests. Experimental results are presented to show that the computation of independent faults can be practically performed.<>
Keywords
fault location; integrated logic circuits; logic testing; fault models; independent faults; maximal set; stuck-at faults; test sets; transition faults; two-pattern tests; Circuit faults; Circuit testing; Cities and towns; Contracts; Delay; FETs; Polynomials; Semiconductor device modeling; System testing; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1992. '10th Anniversary. Design, Test and Application: ASICs and Systems-on-a-Chip', Digest of Papers., 1992 IEEE
Conference_Location
Atlantic City, NJ, USA
Print_ISBN
0-7803-0623-6
Type
conf
DOI
10.1109/VTEST.1992.232716
Filename
232716
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