Title :
An on-chip, attofarad interconnect charge-based capacitance measurement (CBCM) technique
Author :
Chen, J.C. ; McGaughy, B.W. ; Sylvester, D. ; Chenming Hu
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
In this paper, a sensitive and simple technique for parasitic interconnect capacitance measurement with 0.0l fF or 10 aF sensitivity is presented. This on-chip technique is based upon an efficient test structure design. No reference capacitor is needed. The measurement itself is also simple; only a DC current meter is required. We have applied this technique to extract various interconnect geometry capacitances, including the capacitance of a single Metal 2 over Metal 1 crossing, for an industrial double metal process.
Keywords :
capacitance measurement; integrated circuit interconnections; integrated circuit measurement; integrated circuit testing; sensitivity; DC current meter; attofarad sensitivity; industrial double metal process; interconnect charge-based capacitance measurement technique; on-chip technique; parasitic interconnect capacitance measurement; test structure design; Capacitance measurement; Capacitors; Current measurement; Integrated circuit interconnections; Integrated circuit measurements; MOS devices; MOSFETs; Parasitic capacitance; Signal resolution; Testing;
Conference_Titel :
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3393-4
DOI :
10.1109/IEDM.1996.553124