DocumentCode :
3288429
Title :
Design and implementation of an RNS division algorithm
Author :
Hiasat, Ahmad A. ; Abdel-Aty-Zohdy, Hoda S.
Author_Institution :
Dept. of Electr. Eng., Princess Sumaya Univ., Amman, Jordan
fYear :
1997
fDate :
6-9 Jul 1997
Firstpage :
240
Lastpage :
249
Abstract :
In 1995 the authors introduced the main outlines of a new algorithm for division in residue number system, which can be applied to any moduli set. Simulation results proved that the algorithm was many times faster than most competitive published work. Determining the position of the most significant nonzero bit of any residue number in that algorithm is the major speed limiting factor. They customize the same algorithm to serve two specific moduli sets: (2k, 2k-1, 2k-1-1) and (2k+1, 2k, 2k-1), and thus, eliminate that speed limiting factor. Based on this work, hardware needed to determine most significant bit position has been reduced to a single adder. Therefore, computation time and hardware requirements are substantially improved. This would enable RNS to be a stronger force in building general purpose computers
Keywords :
computational complexity; residue number systems; RNS division algorithm design; RNS division algorithm implementation; adder; computation time; general purpose computer building; hardware; hardware requirements; moduli set; residue number system division; speed limiting factor; Algorithm design and analysis; Cathode ray tubes; Decoding; Digital arithmetic; Dynamic range; Hardware; Read-write memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Arithmetic, 1997. Proceedings., 13th IEEE Symposium on
Conference_Location :
Asilomar, CA
ISSN :
1063-6889
Print_ISBN :
0-8186-7846-1
Type :
conf
DOI :
10.1109/ARITH.1997.614901
Filename :
614901
Link To Document :
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