DocumentCode
3288654
Title
Empirical bounds on fault coverage loss due to LFSR aliasing
Author
Debany, Warren H. ; Gorniak, Mark J. ; Daskiewich, Daniel E. ; Macera, Anthony R. ; Kwiat, Kevin A. ; Dussault, Heather B.
Author_Institution
Rome Lab., RL/ERDA, Griffiss AFB, NY, USA
fYear
1992
fDate
7-9 April 1992
Firstpage
143
Lastpage
148
Abstract
Linear-feedback shift registers (LFSRs) are often used to compact test responses. Prior analyses, based on statistically-independent error models, have predicted that aliasing probability ´converges´ to 2/sup -k/ for LFSR polynomials of degree k, and that primitive polynomials perform better than nonprimitive polynomials. This paper presents the first statistical results based on full fault simulation that confirm these predictions. However, the average aliasing probability is not by itself a useful measure of the loss of fault detection information; the authors introduce an upper confidence limit (UCL) for the loss of fault coverage. The ´ideal´ UCL is shown to match closely the empirically-derived UCL.<>
Keywords
built-in self test; fault location; logic testing; polynomials; sequential circuits; shift registers; LFSR aliasing; aliasing probability; fault coverage loss; nonprimitive polynomials; primitive polynomials; test responses; upper confidence limit; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Laboratories; Logic circuits; Phase frequency detector; Polynomials; Probability; Shift registers;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1992. '10th Anniversary. Design, Test and Application: ASICs and Systems-on-a-Chip', Digest of Papers., 1992 IEEE
Conference_Location
Atlantic City, NJ, USA
Print_ISBN
0-7803-0623-6
Type
conf
DOI
10.1109/VTEST.1992.232739
Filename
232739
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