DocumentCode
3288853
Title
Testing and design for testability of BiCMOS logic circuits
Author
Salama, Aly E. ; Elmasry, Mohamed I.
Author_Institution
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
fYear
1992
fDate
7-9 April 1992
Firstpage
217
Lastpage
222
Abstract
BiCMOS technology is one of the leading candidate technologies for VLSI circuits. The authors provide here the results of a simulation-based characterization study of different BiCMOS logic circuits. Different techniques for testing BiCMOS logic circuits are studied. A novel BiCMOS circuit structure that improves the testability of BiCMOS digital circuits is introduced.<>
Keywords
BiCMOS integrated circuits; VLSI; design for testability; logic testing; BiCMOS logic circuits; DFT; VLSI circuits; circuit structure; simulation-based characterization study; testability; BiCMOS integrated circuits; CMOS technology; Circuit faults; Circuit simulation; Circuit testing; Design for testability; Feedback circuits; Logic circuits; Logic testing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1992. '10th Anniversary. Design, Test and Application: ASICs and Systems-on-a-Chip', Digest of Papers., 1992 IEEE
Conference_Location
Atlantic City, NJ, USA
Print_ISBN
0-7803-0623-6
Type
conf
DOI
10.1109/VTEST.1992.232755
Filename
232755
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