DocumentCode :
3288933
Title :
Developments in delay testing
Author :
Savir, Jacob
Author_Institution :
IBM, Poughkeepsie, NY, USA
fYear :
1992
fDate :
7-9 April 1992
Firstpage :
247
Lastpage :
253
Abstract :
The author´s objective is to introduce the reader to the fast emerging field of AC test for digital logic circuits. He includes a brief discussion of the important concepts, algorithms and circuits that are used in conjunction with AC test. A comprehensive bibliography is provided.<>
Keywords :
delays; fault location; logic testing; AC test; delay testing; digital logic circuits; Circuit faults; Circuit testing; Clocks; Delay effects; Hazards; Jacobian matrices; Logic circuits; Propagation delay; Switches; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1992. '10th Anniversary. Design, Test and Application: ASICs and Systems-on-a-Chip', Digest of Papers., 1992 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-7803-0623-6
Type :
conf
DOI :
10.1109/VTEST.1992.232760
Filename :
232760
Link To Document :
بازگشت