Title :
Behavior of faulty single BJT BiCMOS logic gates
Author :
Menon, S.M. ; Malaiya, Y.K. ; Jayasumana, Anura P.
Author_Institution :
Colorado State Univ., Fort Collins, CO, USA
Abstract :
The logic behavior of single BJT BiCMOS devices under transistor level shorts and opens is examined. In addition to delay faults, faults that cause the gate to exhibit sequential behavior were observed. Several faults can be detected only by monitoring the current. The faulty behaviour of bipolar (TTL) and CMOS logic families is compared with BiCMOS. Effects of bridging faults in BiCMOS devices has been examined for both hard short as well as bridging with a significant resistance.<>
Keywords :
BiCMOS integrated circuits; electrical faults; integrated logic circuits; logic gates; BiCMOS logic gates; CMOS logic; TTL; bridging faults; delay faults; faulty behaviour; sequential behavior; single BJT; transistor level shorts; Added delay; BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Circuit faults; Computer science; Logic devices; Logic gates; Logic testing; Very large scale integration;
Conference_Titel :
VLSI Test Symposium, 1992. '10th Anniversary. Design, Test and Application: ASICs and Systems-on-a-Chip', Digest of Papers., 1992 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-7803-0623-6
DOI :
10.1109/VTEST.1992.232772
