DocumentCode
3289166
Title
Design of channel coding in digital video broadcasting system based on FPGA
Author
Ming-chuan, Meng ; Jun-jun, Wu ; Jia-lin, Shao
Author_Institution
Coll. of Light Ind., Hebei Polytech. Univ., Tangshan, China
fYear
2011
fDate
15-17 April 2011
Firstpage
4096
Lastpage
4099
Abstract
This paper introduces the structure of digital video broadcasting system. A channel coding program is proposed that irregular LDPC code and series regular LDPC code are used to be a serially concatenated code. Use FPGA to implement the channel coding program. It can effectively improve the reliability of communications.
Keywords
channel coding; concatenated codes; digital video broadcasting; field programmable gate arrays; parity check codes; telecommunication network reliability; FPGA; channel coding; communication reliability; digital video broadcasting system; irregular LDPC code; serially-concatenated code; series regular LDPC code; Channel coding; Digital video broadcasting; Educational institutions; Field programmable gate arrays; Industries; Parity check codes; Random access memory; FPGA; LDPC code; channel coding; digital video broadcasting System; serially concatenated code;
fLanguage
English
Publisher
ieee
Conference_Titel
Electric Information and Control Engineering (ICEICE), 2011 International Conference on
Conference_Location
Wuhan
Print_ISBN
978-1-4244-8036-4
Type
conf
DOI
10.1109/ICEICE.2011.5778082
Filename
5778082
Link To Document