CISC vs. RISC Hardware and Programming Complexity Measures of Addressing Modes

Author

El-Aawar, Haissam

Author_Institution

Dept. of Comput. Sci., Philadelphia Univ., Amman

fYear

2006

fDate

24-27 May 2006

Firstpage

43

Lastpage

48

Abstract

The article is on the problem of evaluation of specific substructures in computer-based systems. The evaluation scheme utilizes an existing evaluation procedure of already implemented measures. These measures have been applied to determine the complexity measures of algorithmic devices. Two major aspects of address and data have been involved in the evaluation procedure. These two aspects are compared in their specifications with respect to different architectures CISC and RISC

Keywords

computer architecture; reduced instruction set computing; CISC architectures; RISC architectures; addressing modes; algorithmic devices; computer-based systems; hardware complexity measures; programming complexity measures; Application software; Computer aided instruction; Computer architecture; Computer science; Entropy; Hardware; Optimizing compilers; Reduced instruction set computing; Size control; Software algorithms; Algorithmic Devices; addressing modes; complexity; entropy;

fLanguage

English

Publisher

ieee

Conference_Titel

Perspective Technologies and Methods in MEMS Design, 2006. MEMSTECH 2006. Proceedings of the 2nd International Conference on

Conference_Location

Lviv

Print_ISBN

966-553-517-X

Type

conf

DOI

10.1109/MEMSTECH.2006.288660

Filename

4068424