Reliable tantalum gate fully-depleted-SOI MOSFETs with 0.15 /spl mu/m gate length by low-temperature processing below 500/spl deg/C

A reliable tantalum (Ta) gate device technology, which can drastically reduce the number of process steps, has been developed. Ta gate Fully-Depleted-Silicon-On-Insulator (FDSOI) MOSFETs with 0.15 /spl mu/m gate length by low-temperature processing below 500/spl deg/C after the gate oxide formation have good on/off characteristics. Comprehensive design guidelines for Ta gate MOSFETs in the deep-submicron regime are provided by investigating a wide range of performance and reliability constraints on the process temperature and the SOI thickness. For low-temperature processing, there is the lower limit of the SOI thickness which is given by the recrystallization of the source/drain layer.