DocumentCode
3290232
Title
Radar based collision avoidance system implementation in a reconfigurable MPSoC
Author
Khan, Jehangir ; Niar, Smail ; Rivenq, Atika ; El-Hillali, Yassin
fYear
2009
fDate
20-22 Oct. 2009
Firstpage
586
Lastpage
591
Abstract
This paper discusses the design and optimization of an FPGA based MPSoC dedicated to multiple target tracking (MTT) aimed at driver assistance applications. The use of MTT in DAS´s has not been sufficiently investigated before. After designing the application we propose a multi-processor system-on-chip (MPSoC) architecture for its physical implementation in FPGA. We formulate strategies to improve the system speed and reduce its demand for configurable resources. We identify performance bottlenecks and gradually optimize the hardware and software to meet system constraints. The result is a complete embedded MTT application running on a multiprocessor system that fits in a contemporary medium sized FPGA device.
Keywords
collision avoidance; driver information systems; field programmable gate arrays; multiprocessing systems; radar; reconfigurable architectures; road safety; system-on-chip; target tracking; FPGA; driver assistance system; multiple target tracking; radar based collision avoidance system; reconfigurable multiprocessor system-on-chip architecture; Application software; Collision avoidance; Computer architecture; Constraint optimization; Design optimization; Field programmable gate arrays; Hardware; Radar; System-on-a-chip; Target tracking;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Transport Systems Telecommunications,(ITST),2009 9th International Conference on
Conference_Location
Lille
Print_ISBN
978-1-4244-5346-7
Electronic_ISBN
978-1-4244-5347-4
Type
conf
DOI
10.1109/ITST.2009.5399286
Filename
5399286
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