DocumentCode :
3290251
Title :
A Fast Double Layered Decoding Algorithm for Quasi-Cyclic LDPC Codes
Author :
Zhixiong Chen ; Yuan, Jinsha
Author_Institution :
Sch. of Electr. & Electron. Eng., North China Electr. Power Univ., Baoding, China
fYear :
2009
fDate :
16-17 May 2009
Firstpage :
548
Lastpage :
551
Abstract :
Most quasi-cyclic LDPC codes decoders of IEEE 802.11n and IEEE 802.16e standards adopt Layered decoding algorithm recently. A fast double layered decoding algorithm for quasi-cyclic LDPC codes in which two row groupings of check nodes are processed synchronously in order to speed the decoding processing is proposed. Compared to BP algorithm and normal Layered decoding algorithm, the proposed algorithm provides a faster decoding speed and more favorable tradeoffs among complexity, decoding speed and error correcting performance. Simulation results show validity and efficiency of the proposed decoding algorithm.
Keywords :
WiMax; cyclic codes; decoding; error correction codes; parity check codes; wireless LAN; IEEE 802.11; IEEE 802.16; error correcting performance; fast double layered decoding algorithm; quasi-cyclic LDPC codes; Code standards; Costs; Encoding; Error correction; Integrated circuit interconnections; Iterative decoding; Metropolitan area networks; Parity check codes; Power engineering and energy; Wireless LAN; IEEE 802.11n; IEEE 802.16e; Quasi-Cyclic LDPC codes; iterative message-passing decoding; layered decoding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits, Communications and Systems, 2009. PACCS '09. Pacific-Asia Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-0-7695-3614-9
Type :
conf
DOI :
10.1109/PACCS.2009.143
Filename :
5232407
Link To Document :
بازگشت