Very Fast Multi Operand Addition Method by Bitwise Subtraction

Basic operations of public key cryptography are multiplication and exponentiation. Because of long operand length, their processing is very time consuming operations. The basic of all of these operations is multi operand addition. To improve this operation´s performance, many methods are used, that carry save adder (CSA) is the best method until now. This paper proposed a new method with the same performance as CSA but with 40% less logic gates than CSA. This area reduction may lead to less power consumption and sometimes more processing speed, that are suitable for embedded processor. The idea of proposed method is bitwise subtraction that there is no carry propagation needed that is very useful for long length multi additions.