Set top box SoC design methodology at STMicroelectronics

In this paper, we review how the IP reuse SoC design methodology has evolved from its first introduction, heavily based on IP reuse, to a state-of-the-art design flow, based on soft and hard IP block and floorplanning tools. This is illustrated in one complex SoC present in the broadband communication market today, which is a set top box IC containing a proprietary 64 bit processor and some general-purpose blocks, along with dedicated functions specifically designed by STMicroelectronics. In order to manage designs of this complexity, a top-down, block-based design style, relying on automatic floorplanning tools, is described. This design style uses the classical ´divide-and-conquer´ strategy and thus enables a concurrent development process, guaranteeing timing convergence and correct chip assembly.