A fully qualified top-down and bottom-up mixed-signal design flow for non volatile memories technologies

The wide range and rapid increase in the complexity of EDA tools demand proven and safe design flows. This paper presents a complete and fully qualified mixed-signal top-down design flow for non volatile memory applications. It has been successfully applied to an embedded flash macrocell based design as well as to a 14 bit analog/digital converter with digital non linearity compensation manufactured in 0.18 μm proprietary flash technology. One remarkable feature of the proposed methodology is the high level of integration among EDA tools from different vendors and internally developed solutions. The mixed-signal domain has been really explored at all levels: functional, behavioural, VHDL/schematic and post layout with parasitic components. Furthermore, we propose a bottom-up methodology to generate and validate VHDL-AMS models for IP analog cells. All the illustrated features are integrated in a design flow which provides full compatibility and flexibility between analog and digital design steps to cut down time-to-design, improve time-to-market and streamline design quality.