Analysis and design of 5GHz phase locked loops

Phase locked loop analysis using discrete z-domain transfer functions is presented. An impulse invariance method that produces the same z-domain equations as that of the differential analysis is first shown for a second order loop. The condition is obtained. Then a closed form third order loop equation in discrete z-domain is derived. A 3rd order 5GHz phase lock loop used for a 10 giga-bit transceiver is designed based on the discrete z-domain model and analysis. Jitter transfer of the PLL is measured, and compared with the predicted jitter transfer curve, with less than 0.1dB of peaking in the pass band. Random jitter measurement is also shown, together with silicon micrograph.