DocumentCode :
3290970
Title :
A Lightweight Fault-Tolerant Mechanism for Network-on-Chip
Author :
Koibuchi, Michihiro ; Matsutani, Hiroki ; Amano, Hideharu ; Pinkston, Timothy Mark
Author_Institution :
Nat. Inst. of Inf., Tokyo
fYear :
2008
fDate :
7-10 April 2008
Firstpage :
13
Lastpage :
22
Abstract :
Survival capability is becoming a crucial factor in designing multicore processors built with on-chip packet networks, or networks on chip (NoCs). In this paper, we propose a lightweight fault-tolerant mechanism for NoCs based on default backup paths (DBPs) designed to maintain, in the presence of failures, network connectivity of both non-faulty routers as well as healthy processor cores which may be connected to faulty routers. The mechanism provides default paths as backup between certain router ports which serve as alternative datapaths to circumvent failed components within a faulty router. Along with a minimal subset of normal network channels, the set of default backup paths internal to faulty routers form - in the worst case - a unidirectional ring topology that provides network-wide connectivity to all processor cores. Routing using the DBP mechanism is proved to be deadlock-free with only two virtual channels even for fault scenarios in which regular networks degrade to irregular (arbitrary) topologies. Evaluation results show that, for a 2-D mesh wormhole NoC, only 12.6% additional hardware resources are needed to implement the proposed DBP mechanism in order to provide graceful performance degradation without chip-wide failure as the number of faults increases to the maximum needed to form ring.
Keywords :
fault tolerance; integrated circuit design; multiprocessor interconnection networks; network routing; network-on-chip; 2D mesh wormhole network-on-chip; default backup paths; lightweight fault-tolerant mechanism; multicore processor design; network-wide connectivity; nonfaulty routers; on-chip packet networks; survival capability; unidirectional ring topology; Degradation; Fault tolerance; Hardware; Network topology; Network-on-a-chip; Redundancy; Robustness; Routing; Switches; System recovery; Network-on-Chip; deadlock avoidance; fault tolerance; on-chip network; reliability; routing algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Networks-on-Chip, 2008. NoCS 2008. Second ACM/IEEE International Symposium on
Conference_Location :
Newcastle upon Tyne
Print_ISBN :
0-7695-3098-2
Type :
conf
DOI :
10.1109/NOCS.2008.4492721
Filename :
4492721
Link To Document :
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