Recurrent neural network model on an SIMD parallel architecture

This work discusses the parallel implementation of a recurrent neural network model (Hopfield model) on an single instruction multiple data (SIMD) architecture. The parallel algorithm is developed for a prototype SIMD chip which is called the BLITZEN architecture. Time complexities of sequential and parallel implementations are computed and compared for execution speed-up. The algorithm is executed on a simulator of the actual parallel processor chip and successfully tested for a simple pattern recognition problem. The execution speed up in parallel implementation is significant.