• DocumentCode
    329113
  • Title

    A wavefront array processing architecture for real-time simulation of large scale neural networks

  • Author

    Kim, Myung Won ; Lee, Youngjik ; Kim, Chong Moon ; Song, Yoonseon

  • Author_Institution
    Res. Dept., Korea Electron. & Telecommun. Res. Inst., Daejeon, South Korea
  • Volume
    2
  • fYear
    1993
  • fDate
    25-29 Oct. 1993
  • Firstpage
    1959
  • Abstract
    Describes a scalable parallel architecture for real-time, large scale neural network simulations. Currently the SIMD architecture is largely adopted for implementing digital neurocomputers. However, it is not efficient for simulating large scale neural networks in real-time because of its limited scalability and flexibility. The authors investigate, as a solution, a wavefront array processing (WAP) architecture based on asynchronous communications. The authors compare both architectures in scalability, performance, and flexibility for simulating multi-layer perceptrons. The authors also briefly discuss implementing a high performance digital neurocomputer based on the WAP.
  • Keywords
    digital simulation; multilayer perceptrons; parallel architectures; asynchronous communications; flexibility; high performance digital neurocomputer; large scale neural networks; multi-layer perceptrons; performance; real-time simulation; scalability; scalable parallel architecture; wavefront array processing architecture; Array signal processing; Clocks; Computer architecture; Computer networks; Large-scale systems; Multilayer perceptrons; Neural networks; Parallel architectures; Parallel processing; Scalability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks, 1993. IJCNN '93-Nagoya. Proceedings of 1993 International Joint Conference on
  • Print_ISBN
    0-7803-1421-2
  • Type

    conf

  • DOI
    10.1109/IJCNN.1993.717040
  • Filename
    717040