A Novel Transconductor with High Linearity

A novel transconductor based on folded cascode local feedback loop to provide low resistance nodes around source degeneration resistor is presented. The proposed transconductor achieves high linearity and shows less sensitive to channel length modulation and mismatch than traditional topology. This design uses UMC 0.18 um CMOS process. Simulation result shows the proposed transconductor operates in 1.8 V supply voltage and has a total harmonic distortions (THD) of lower than -80 dB with 10 MHz 1.2 V_p-p different input. The power consumption is 1.6 mW.