DocumentCode
3291376
Title
An On-Chip and Inter-Chip Communications Network for the SpiNNaker Massively-Parallel Neural Net Simulator
Author
Plana, Luis A. ; Bainbridge, John ; Furber, Steve ; Salisbury, Sean ; Shi, Yebin ; Wu, Jian
Author_Institution
Univ. of Manchester, Manchester
fYear
2008
fDate
7-10 April 2008
Firstpage
215
Lastpage
216
Abstract
SpiNNaker is a scalable, multichip system designed for the purpose of real-time modelling of spiking neurons with an efficient multicast communications infrastructure inspired by neurobiology. SpiNNaker uses a GALS packet-switched network to emulate the very high connectivity of biological systems. This paper presents the on-chip and inter-chip communications network for SpiNNaker.
Keywords
neural nets; system buses; GALS; SpiNNaker; biological system connectivity; interchip communications network; massively-parallel neural net simulator; multicast communications; multichip system; onchip communications network; packet-switched network; spiking neuron modelling; Associative memory; Clocks; Communication networks; Fabrics; Network-on-a-chip; Neural networks; Neurons; Pipelines; Pressure control; Routing; Bandwidth aggregation; GALS; Synchonizer; source-address routing;
fLanguage
English
Publisher
ieee
Conference_Titel
Networks-on-Chip, 2008. NoCS 2008. Second ACM/IEEE International Symposium on
Conference_Location
Newcastle upon Tyne
Print_ISBN
0-7695-3098-2
Type
conf
DOI
10.1109/NOCS.2008.4492744
Filename
4492744
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