DocumentCode
3291956
Title
Pockets engineering impact on mismatch performance on 45nm MOSFET technologies
Author
Mezzomo, Cecilia M. ; Leyris, Cedric ; Josse, Emmanuel ; Ghibaudo, Gérard
Author_Institution
STMicroelectronics, Crolles
fYear
2009
fDate
18-20 March 2009
Firstpage
15
Lastpage
18
Abstract
Pocket architecture is a useful technique to eliminate short channel effects. However, it has been shown an influence on mismatch performances. In this paper, different implant trials are done on NMOS devices with dose and energy variation. For the first time, the impact of indium implant will be analyzed to optimize mismatch performance. It is demonstrated that this implant decreases significantly the mismatch. Moreover, it diminishes the variability not only at small gate lengths but also at large ones.
Keywords
MOSFET; indium; JkJk:In; MOSFET technologies; MOSFET transistor; NMOS devices; indium implant; pockets engineering; Fluctuations; Geometry; Implants; Indium; MOS devices; MOSFET circuits; Performance analysis; Testing; Threshold voltage; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Ultimate Integration of Silicon, 2009. ULIS 2009. 10th International Conference on
Conference_Location
Aachen
Print_ISBN
978-1-4244-3704-7
Type
conf
DOI
10.1109/ULIS.2009.4897528
Filename
4897528
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