Title :
Low power design of public key algorithm ASIC´S cell library
Author :
Yu-hua, Wu ; Yan-jun, Li
Author_Institution :
Dept. of Electron. Inf. Eng., Beijing Electron. Sci. & Technol. Inst., Beijing, China
Abstract :
Along with the popularization of the embedded equipments and the hand-hold equipments, the power consumption already became the first essential factor. In this paper, we will design a low power cell library which is suitable for the public key algorithm by changing the circuit structure, reducing the number of transistors and clock gating. We will design the low power consumption standard cells, and draw the layouts, and gain the standard cell library, which can be provided to the public key algorithm chip designer.
Keywords :
application specific integrated circuits; power consumption; public key cryptography; transistors; ASIC cell library; circuit structure; clock gating; embedded equipments; hand-hold equipments; power consumption; power consumption standard cells; public key algorithm chip designer; standard cell library; transistors; Algorithm design and analysis; Application specific integrated circuits; Integrated circuit modeling; Libraries; Power demand; Public key; Semiconductor device modeling; ASIC; Low Power Consumption; Public Key Arithmetic; Standard Cell Library;
Conference_Titel :
Electric Information and Control Engineering (ICEICE), 2011 International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-8036-4
DOI :
10.1109/ICEICE.2011.5778273
