DocumentCode :
3292887
Title :
SOI Low Power I.model For Analog And Digital Circuits Calibrated Using Virtual Wafer Fab
Author :
Lai, J.C. ; Yue, J. ; Beaudoin, K.P.
fYear :
1997
fDate :
3-5 June 1997
Firstpage :
334
Lastpage :
338
Keywords :
Charge carrier processes; Digital circuits; Diodes; Electron mobility; Impact ionization; Large Hadron Collider; MOS devices; Semiconductor device modeling; Temperature; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 1997. Proceedings of Technical Papers. 1997 International Symposium on
Conference_Location :
Taipei, Taiwan
ISSN :
1524-766X
Print_ISBN :
0-7803-4131-7
Type :
conf
DOI :
10.1109/VTSA.1997.614926
Filename :
614926
Link To Document :
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