DocumentCode
3293124
Title
Sample Efficient Regression Trees (SERT) for Yield Loss Analysis
Author
Chen, Argon ; Hong, Amos ; Ho, Odey ; Liu, Chao-Wen ; Huang, Yi-His
Author_Institution
Nat. Taiwan Univ., Taipei
fYear
2006
fDate
25-27 Sept. 2006
Firstpage
29
Lastpage
32
Abstract
Regression trees have been known to be an effective data mining tool for semiconductor yield analysis. The regression tree is built by iteratively splitting data set and selecting factors into a hierarchical tree model. The sample size reduces sharply after few levels of data splitting and causes unreliable factor selection. In contrast, the forward regression analysis selects the influential variables all the way with the same set of data. Regression analysis is, however, not capable of splitting data into groups with different models. In this research, we propose a sample- efficient regression tree (SERT) that combines the forward regression and regression tree methodologies and show that SERT is effective in discovering yield-loss causes during the yield ramp-up stage where the sample size available for analysis is extremely small.
Keywords
data mining; electronic engineering computing; regression analysis; trees (mathematics); data mining tool; hierarchical tree model; sample efficient regression trees; semiconductor yield analysis; yield loss analysis; yield ramp-up stage; Argon; Cause effect analysis; Chaos; Data mining; Decision trees; Equations; Industrial engineering; Mechanical engineering; Regression analysis; Regression tree analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2006. ISSM 2006. IEEE International Symposium on
Conference_Location
Tokyo
ISSN
1523-553X
Print_ISBN
978-4-9904138-0-4
Type
conf
DOI
10.1109/ISSM.2006.4493014
Filename
4493014
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