Title :
Design of a CMOS 1.8V low voltage differential signaling receiver
Author :
Aguirre, Miguel ; Heredia, Carlos ; Torres, Hector ; Palomera, Rogelio ; Jiménez, Manuel
Author_Institution :
Dept. of Electr. & Comput. Eng., Puerto Rico Univ., Mayaguez, Puerto Rico
Abstract :
The design of a 1.8V LVDS receiver operating at a maximum speed of 700Mbits/sec is presented. The receiver is designed to accept LVDS signals from 3.3V, 2.5V, or 1.8V systems and converts it to a 1.8V digital data. The design was completed on a 0.24μm CMOS process and complying with the industry standard of ±10% power supply variations over a temperature range from -40°C to +85°C. At the nominal supply voltage of 1.8V and operating at maximum speed the receiver consumes less than 6.5mW.
Keywords :
CMOS integrated circuits; consumer electronics; low-power electronics; receivers; 0.24 micron; 1.8 V; 2.5 V; 3.3 V; 40 to 85 degC; 6.5 mW; 700 Mbit/s; CMOS process; LVDS signals; consumer electronics; industry standard; low voltage differential signaling receiver; low-power consumption; power supply variations; Attenuation; Circuits; Design engineering; Equations; Low voltage; Personal digital assistants; Power supplies; Signal design; Temperature distribution; Transceivers;
Conference_Titel :
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN :
0-7803-7523-8
DOI :
10.1109/MWSCAS.2002.1186945
