Title :
Enhanced wafer analysis using a combination of test, emission and software net tracing
Author :
Portune, R. ; Kapilevich, I. ; Deslandes, H. ; Nicholson, R. ; Forli, L. ; Thetiot, M. ; Posson, S. ; Picart, B.
Author_Institution :
DCG Syst., Inc., Fremont, CA, USA
Abstract :
We describe a wafer analysis methodology which uses test data, emission data and CAD data to accurately predict the location and type of defect. The methodology described enabled us to know the location with metal layer information and type of defect before performing destructive physical analysis.
Keywords :
electronic design automation; integrated circuit testing; CAD data; destructive physical analysis; emission data; enhanced wafer analysis; software net tracing; test data; Electrostatic discharge; Failure analysis; Integrated circuit modeling; Power engineering and energy; Protection; RLC circuits; Robustness; Scanning electron microscopy; Software testing; Stress;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2009. IPFA 2009. 16th IEEE International Symposium on the
Conference_Location :
Suzhou, Jiangsu
Print_ISBN :
978-1-4244-3911-9
Electronic_ISBN :
1946-1542
DOI :
10.1109/IPFA.2009.5232600
