DocumentCode :
3294481
Title :
Yield Methodology for Mixed Signal Process Development
Author :
Liu, Jin ; Donnelly, Imelda ; Wang, Jianglin ; Jones-Williams, Pam
Author_Institution :
Texas Instrum., Dallas
fYear :
2006
fDate :
25-27 Sept. 2006
Firstpage :
325
Lastpage :
327
Abstract :
Develop for yield is a key component in our technology development methodology in the mixed signal technology development (MSTD) organization of Texas Instruments. Relying on a comprehensive set of integrated yield monitors (IYMs) and DDSRAM, we begin our yield learning as early as process definition phase. The yield activity evolves together with component development, process integration and design rule formation. Yield issues are identified through systematic data reduction of test results and FA. On average, 4 to 6 major yield issues are found on each new technology prior to ramp. The methodology has typically resulted in a 6-12 month acceleration in yield learning.
Keywords :
DRAM chips; SRAM chips; Texas Instruments; component development; integrated yield monitors; mixed signal process development; mixed signal technology development organization; process design rule formation; process integration; technology development methodology; yield methodology; Acceleration; Capacitors; Circuit testing; Data analysis; Diodes; Instruments; Process design; Prototypes; Signal processing; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing, 2006. ISSM 2006. IEEE International Symposium on
Conference_Location :
Tokyo
ISSN :
1523-553X
Print_ISBN :
978-4-9904138-0-4
Type :
conf
DOI :
10.1109/ISSM.2006.4493096
Filename :
4493096
Link To Document :
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