Transient and permanent fault diagnosis for FPGA-based TMR systems

Author

D´Angelo, Sergio ; Metra, Cecilia ; Sechi, Giacomo

Author_Institution

IFC, CNR, Milano, Italy

fYear

1999

fDate

36465

Firstpage

330

Lastpage

338

Abstract

In this paper we propose a hardware scheme to allow the diagnosis of transient and permanent faults affecting a Triple Modular Redundancy (TMR) system implemented by means of Field Programmable Gate Arrays (FPGAs). Our scheme allows us to easily identify whether a fault affects one of the replicated modules, the voter, or the scheme itself; and whether such a fault is permanent or transient. Our scheme can therefore be used to drive the selection of the most proper recovery technique for each kind of diagnosed fault. It is suitable to be implemented by means of FPGAs, and has been verified to feature self-checking ability with respect to a wide set of possible internal faults belonging to a realistic set

Keywords

VLSI; fault diagnosis; fault tolerant computing; field programmable gate arrays; logic testing; redundancy; transient analysis; FPGA-based TMR systems; field programmable gate arrays; hardware scheme; internal faults; permanent fault diagnosis; recovery technique selection; self-checking ability; transient fault diagnosis; triple modular redundancy systems; Aerospace electronics; Circuit faults; Degradation; Error correction; Fault diagnosis; Fault tolerance; Field programmable gate arrays; Hardware; Redundancy; Voting;

fLanguage

English

Publisher

ieee

Conference_Titel

Defect and Fault Tolerance in VLSI Systems, 1999. DFT '99. International Symposium on

Conference_Location

Albuquerque, NM

ISSN

1550-5774

Print_ISBN

0-7695-0325-x

Type

conf

DOI

10.1109/DFTVS.1999.802900

Filename

802900