DocumentCode
3294752
Title
Yield enhancement/Productivity improvement for Sub-110nm Memory Lithography using new alignment strategy
Author
Choi, C.I. ; Hans Sui ; Rice Ma ; Lu, Ting ; Ji, Jean ; Mieno, F.
Author_Institution
Semicond. Manuf. Int. Corp., Shanghai
fYear
2006
fDate
25-27 Sept. 2006
Firstpage
381
Lastpage
384
Abstract
The characteristics and performance of SPM and XPA were investigated for the sub-110 nm and below memory lithography. Various alignment strategies using SPM and XPA were compared on the production wafer for improved overlay performance. It is evident that SPM out-performs XPA for most of layers as CMP can easily over polish XPA due to the low pattern density. Based on these results, it is believed that SPM will be a promising candidate for sub-110 nm memory process with better overlay performance.
Keywords
analogue storage; lithography; alignment strategies; memory lithography; pattern density; size 110 nm; Controllability; Lithography; Logic; Manufacturing; Production; Productivity; Scanning probe microscopy; Semiconductor device manufacture; Silicon compounds; Throughput; Overlay; SPM; XPA; residual; throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2006. ISSM 2006. IEEE International Symposium on
Conference_Location
Tokyo
ISSN
1523-553X
Print_ISBN
978-4-9904138-0-4
Type
conf
DOI
10.1109/ISSM.2006.4493113
Filename
4493113
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