DocumentCode
3294858
Title
IEEE recommended practice for powering and grounding electronic equipment. (Color Book Series - Emerald Book)
Author
Patt, Yale
fYear
1999
fDate
1999
Firstpage
2
Abstract
Summary form only given, as follows. There seems to be no end to the higher and higher performance expected of future generations of microprocessors. By the year 2001, process technology will provide 100 million transistors on a single silicon die, and by the year 2008, one billion transistors. Our job: to harness these transistors on behalf of higher performance. Performance is always about delivering instruction bandwidth to the core, and then consuming that bandwidth. That means very wide issue machines, combined with what it takes to support them. In this talk, we will discuss the major challenges to delivering high instruction bandwidth, and the major challenges to consuming that bandwidth, and what we are doing about them. We will look at our two most recent activities: a very aggressive Trace Cache and Subordinate Simultaneous Microthreading. Finally, we will look at some of what remains to be done, and what that will look like in the microprocessor of the year 2008
Keywords
cache storage; microprocessor chips; technological forecasting; future generations; instruction bandwidth; microprocessors; process technology; subordinate simultaneous microthreading; trace cache;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits and Systems Design, 1999. Proceedings. XII Symposium on
Conference_Location
Natal
Print_ISBN
0-7695-0387-X
Type
conf
DOI
10.1109/SBCCI.1999.802955
Filename
802955
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