Abstract :
Summary form only given, as follows. There seems to be no end to the higher and higher performance expected of future generations of microprocessors. By the year 2001, process technology will provide 100 million transistors on a single silicon die, and by the year 2008, one billion transistors. Our job: to harness these transistors on behalf of higher performance. Performance is always about delivering instruction bandwidth to the core, and then consuming that bandwidth. That means very wide issue machines, combined with what it takes to support them. In this talk, we will discuss the major challenges to delivering high instruction bandwidth, and the major challenges to consuming that bandwidth, and what we are doing about them. We will look at our two most recent activities: a very aggressive Trace Cache and Subordinate Simultaneous Microthreading. Finally, we will look at some of what remains to be done, and what that will look like in the microprocessor of the year 2008
