Title :
Use of Vertical Scanning Interferometry to Optimize HDP Oxide Thickness for STI CMP
Author :
Beckage, Peter J. ; Tang, Tito ; Lam, Kin-Sang
Author_Institution :
Spansion LLC, Austin
Abstract :
In an attempt to increase polisher throughput and reduce slurry costs at STI CMP, modifications to the HDP oxide deposition step were conducted. This was done after observing a reduced time to planarize a wafer with thicker oxide. Vertical scanning Interferometry was used to aid in understanding the wafer surface topography as a function of the HDP oxide deposition. Wafers deposited with 17000A of oxide, ~3 times the usual thickness, produced a wafer surface with less topography and a significantly reduced time to planarize on the polisher. The sputter deposition ratio in the HDP oxide process was modulated to provide a wafer surface with less topography than a nominally deposited thickness.
Keywords :
polishing; sputter deposition; surface topography; wafer level packaging; chemical mechanical polish; high density plasma oxide thickness; sputter deposition ratio; vertical scanning interferometry; wafer deposition; wafer surface topography; Interference; Optical filters; Optical interferometry; Protection; Silicon compounds; Slurries; Sputtering; Surface topography; Throughput; Transistors;
Conference_Titel :
Semiconductor Manufacturing, 2006. ISSM 2006. IEEE International Symposium on
Conference_Location :
Tokyo
Print_ISBN :
978-4-9904138-0-4
DOI :
10.1109/ISSM.2006.4493120
